A differential transimpedance amplifier is commonly used to convert a differential input current to a differential output voltage. For example, in a fiber-optics based communications system, photo-diodes in an optical receiver may provide differential output currents based on received optical data. A differential transimpedance amplifier may be coupled to the photo-diodes to convert the differential output currents into differential output voltages. As fiber-optics based communications standards evolve, reach requirements will increase, which will require optical receivers with increased effective sensitivity. Therefore, differential transimpedance amplifiers will be needed with improved noise performance, increased dynamic range, and improved linearity.
Presently, digital limiting differential transimpedance amplifiers are used with 40 Gigabit per second and 100 Gigabit per second optical receivers to support differential phase shift keying (DPSK) and differential quadrature phase shift keying (DQPSK) modulation methods. However, such amplifiers typically have 50 ohm input resistors, which may introduce unacceptable levels of noise in future systems. FIG. 1 shows a differential limiting amplifier 10 according to the prior art. The differential limiting amplifier 10 includes a first input transistor element QI1, a second input transistor element QI2, a first output transistor element QO1, a second output transistor element QO2, a first resistive element R1 coupled between a base of the first input transistor element QI1 and a DC supply bus, a second resistive element R2 coupled between a base of the second input transistor element QI2 and the DC supply bus, a third resistive element R3 coupled between a collector of the first output transistor element QO1 and the DC supply bus, a fourth resistive element R4 coupled between a collector of the second output transistor element QO2 and the DC supply bus, a first current source 12 coupled between an emitter of the first input transistor element QI1 and ground, a second current source 14 coupled between an emitter of the second input transistor element QI2 and ground, and a third current source 16 coupled between an emitter of the first output transistor element QO1 and ground.
The emitter of the first input transistor element QI1 is coupled to a base of the first output transistor element QO1 and the emitter of the second input transistor element QI2 is coupled to a base of the second output transistor element QO2. The emitter of the first output transistor element QO1 is coupled to an emitter of the second output transistor element QO2. Collectors of the first and second input transistor elements QI1, QI2 are coupled to the DC supply bus. A positive-side input signal VINP feeds the base of the first input transistor element QI1 and a negative-side input signal VINN feeds the base of the second input transistor element QI2. The positive-side and negative-side input signals VINP, VINN are normally phase-shifted about 180 degrees from one another and form a differential input signal. The collector of the first output transistor element QO1 provides a positive-side output signal VOUTP and the collector of the second output transistor element QO2 provides a negative-side output signal VOUTN. The positive-side and negative-side output signals VOUTP, VOUTN are normally phase-shifted about 180 degrees from one another and form a differential output signal. A DC supply signal VDCSUP feeds the DC supply bus.
The first and second input transistor elements QI1, QI2 operate as emitter followers that provide voltages at their respective emitters based on voltages at their respective bases. The first and second output transistor elements QO1, QO2, the third and fourth resistive elements R3, R4, and the third current source 16 form a differential amplifier. The bases of the first and second output transistor elements QO1, QO2 are inputs to the differential amplifier; therefore, the emitter voltages of the first and second input transistor elements QI1, QI2 feed the inputs to the differential amplifier. The collectors of the first and second output transistor elements QO1, QO2 are outputs from the differential amplifier that provide the positive-side and negative-side output signals VOUTP, VOUTN, respectively. Since the differential amplifier tends to amplify differential signals and not amplify common mode signals, a voltage difference between the positive-side and negative-side output signals VOUTP, VOUTN is based on a voltage difference between the positive-side and negative-side input signals VINP, VINN.
The differential limiting amplifier 10 may be used as a transimpedance amplifier by converting input currents associated with the positive-side and negative-side input signals VINP, VINN into input voltages by routing most of the input currents into the first and second resistive elements R1, R2. The resulting voltage drop across the first and second resistive elements R1, R2 provides the input voltages. The first and second resistive elements R1, R2 are sized to provide appropriate conversion values. For example, in one application, a value of each of the first and second resistive elements R1, R2 is equal to about 50 ohms, which may be noisy. Since a differential limiting amplifier 10 may be noisy, a differential transimpedance amplifier used as a pre-amplifier stage may reduce noise.
FIG. 2 shows a differential transimpedance amplifier 18 according to the prior art. The differential transimpedance amplifier 18 includes the first input transistor element QI1, the second input transistor element QI2, a first feedback transistor element QF1, a second feedback transistor element QF2, the first resistive element R1 coupled between the collector of the first input transistor element QI1 and a DC supply bus, the second resistive element R2 coupled between the collector of the second input transistor element QI2 and the DC supply bus, the third resistive element R3 coupled between an emitter of the first feedback transistor element QF1 and ground, the fourth resistive element R4 coupled between an emitter of the second feedback transistor element QF2 and ground, the first current source 12 coupled between the emitter of the first input transistor element QI1 and ground, a first feedback resistive element RF1 coupled between the emitter of the first feedback transistor element QF1 and the base of the first input transistor element QI1, and a second feedback resistive element RF2 coupled between the emitter of the second feedback transistor element QF2 and the base of the second input transistor element QI2.
The collector of the first input transistor element QI1 is coupled to a base of the first feedback transistor element QF1 and the collector of the second input transistor element QI2 is coupled to a base of the second feedback transistor element QF2. The emitter of the first input transistor element QI1 is coupled to the emitter of the second input transistor element QI2. Collectors of the first and second feedback transistor elements QF1, QF2 are coupled to the DC supply bus. A positive-side transimpedance input signal VTINP feeds the base of the first input transistor element QI1 and a negative-side transimpedance input signal VTINN feeds the base of the second input transistor element QI2. The positive-side and negative-side transimpedance input signals VTINP, VTINN are normally phase-shifted about 180 degrees from one another and form a differential input signal. The collector of the first input transistor element QI1 provides a positive-side transimpedance output signal VTOUTP and the collector of the second input transistor element QI2 provides a negative-side transimpedance output signal VTOUTN. The positive-side and negative-side transimpedance output signals VTOUTP, VTOUTN are normally phase-shifted about 180 degrees from one another and form a differential output signal. The DC supply signal VDCSUP feeds the DC supply bus.
The first and second input transistor elements QI1, QI2, the first and second resistive elements R1, R2, and the first current source 12 form a differential amplifier. The bases of the first and second input transistor elements QI1, QI2 are inputs to the differential amplifier, and the collectors of the first and second input transistor elements QI1, QI2 are outputs from the differential amplifier. The first and second feedback transistor elements QF1, QF2, the third and fourth resistive elements R3, R4, and the first and second feedback resistive elements RF1, RF2 form a feedback circuit that provides feedback from the outputs of the differential amplifier back to the inputs of the differential amplifier. Therefore, the differential transimpedance amplifier 18 may operate as a differential amplifier with differential feedback.
Since the differential transimpedance amplifier 18 is a transimpedance amplifier, which is commonly used to convert a differential input current to a differential output voltage, the positive-side and negative-side transimpedance input signals VTINP, VTINN are normally associated with positive-side and negative-side transimpedance input currents ITINP, ITINN, respectively. Most of the positive-side and negative-side transimpedance input currents ITINP, ITINN may flow through the first and second feedback resistive elements RF1, RF2, respectively. The first and second feedback resistive elements RF1, RF2 have positive-side and negative-side feedback currents IFP, IFN, respectively, which may be slightly less than the positive-side and negative-side transimpedance input currents ITINP, ITINN. The positive-side and negative-side feedback currents IFP, IFN and currents from the emitters of the first and second feedback transistor elements QF1, QF2 combine to feed the third and fourth resistive elements R3, R4, respectively, which have third and fourth resistive currents IR3, IR4, respectively. Most of the positive-side transimpedance input current ITINP, all of the positive-side feedback current IFP, and a portion of the third resistive current IR3 may follow a positive-side current path IPATHP. Similarly, most of the negative-side transimpedance input current ITINN, all of the negative-side feedback current IFN, and a portion of the fourth resistive current IR4 may follow a negative-side current path IPATHN.
Since the differential transimpedance amplifier 18 may operate as a differential amplifier with differential feedback, a voltage difference between the positive-side and negative-side transimpedance output signals VTOUTP, VTOUTN may be based on a current difference between the positive-side and negative-side transimpedance input currents ITINP, ITINN.
Use of the differential transimpedance amplifier 18 as a pre-amplifier stage may reduce noise compared to a differential limiting amplifier 10, but may be at the expense of linearity and dynamic range. Future optical communications systems may require linear operation to support advanced features, such as coherent detection and digital signal processing, which may be associated with electronic dispersion compensation (EDC). Thus, there is a need for a differential transimpedance amplifier which may be used as a pre-amplifier stage, is linear, has wide dynamic range, and has low noise.